User Manual Q&AAnswer
Apr 09, 2025 - 01:49 AM
To generate a design example for the External Memory Interfaces Intel Agilex FPGA IP, follow these steps:
1. Launch the Intel Quartus Prime software and create a new project by selecting File ➤ New Project Wizard. Specify a directory, project name, and top-level design entity name. Click Next.
2. Verify that Empty Project is selected and click Next two times.
3. Under Family, select Intel Agilex. Under Name filter, type the device part number. Select the appropriate device from the Available devices list. Click Finish.
4. In the IP Catalog window, select External Memory Interfaces Intel Agilex FPGA IP. If the IP Catalog window is not visible, select View ➤ IP Catalog.
5. In the IP Parameter Editor, provide an entity name for the EMIF IP and specify a directory. Click Create.
6. Configure the parameters in the IP Parameter Editor tabs to reflect your EMIF implementation. Make sure to enter the correct speed grade for the device, memory clock frequency, and PLL reference clock frequency.
7. On the Example Designs tab, select the Synthesis box to generate the synthesizable design example. If you are implementing a design with multiple interfaces, specify the Number of IPs to the desired number of interfaces and configure each interface accordingly.
8. Click File ➤ Save to save the current settings into the user IP variation file.
9. Click Generate Example Design in the upper-right corner of the window.
10. Specify a directory for the EMIF design example and click OK. The successful generation of the EMIF design example will create the necessary fileset.
11. To open the example design, click File ➤ Open Project and navigate to the project directory. Open the qii/ed_synth.qpf file.
Note: If you want to generate a design example for simulation, follow the same steps but select the Simulation box on the Example Designs tab instead of the Synthesis box.
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