How do I generate and configure the EMIF IP for the Intel Stratix 10 FPGA? (External Memory Interfaces intel Stratix 1 0 FPGA IP Design Example User Guide)

Answer

manuals.plus

Mar 07, 2025 - 03:09 AM

1
To generate and configure the EMIF IP for the Intel Stratix 10 FPGA, follow these steps:

1. Launch the Intel Quartus Prime software and create a new project by selecting File ➤ New Project Wizard. Specify a directory and name for the project.
2. In the IP Catalog window, select Intel Stratix 10 External Memory Interfaces.
3. In the IP Parameter Editor, provide an entity name for the EMIF IP and specify a directory. Click Create.
4. Configure the parameters in the parameter editor tabs to reflect your EMIF implementation. Make sure to enter the correct speed grade for the device, memory clock frequency, and PLL reference clock frequency in the General tab.
5. Refer to the data sheet for your memory device and enter the parameters on the Memory tab.
6. For initial project investigations, you can use the default settings on the Mem I/O and FPGA I/O tabs. For advanced design validation, perform board simulation and enter optimal termination settings and appropriate I/O standards.
7. For initial project investigations, you can use the default settings on the Mem Timing and Board tabs. For advanced design validation, enter parameters according to your memory device's data sheet and perform board simulation to derive accurate timing information.
8. Set the controller parameters according to the desired configuration and behavior for your memory controller on the Controller tab.
9. Use the parameters on the Diagnostics tab to assist in testing and debugging your memory interface.
10. On the Example Designs tab, you can generate design examples for synthesis and simulation. Check the Synthesis box to generate a synthesizable design example and check the Simulation box to generate a design example for simulation.
11. Click Generate Example Design in the upper-right corner of the window and specify a directory for the EMIF design example.
12. Successful generation of the EMIF design example will create the necessary file sets for synthesis or simulation.

For more detailed information on each parameter, refer to the appropriate chapter for your memory protocol in the Intel Stratix 10 External Memory Interfaces IP User Guide.