How to test memory reads, writes, bandwidth, and latency with Native Loopback Accelerator Functional Unit? (intel Native Loopback Accelerator Functional Unit User Guide)

Answer

manuals.plus

Mar 07, 2025 - 02:50 AM

To use the Native Loopback Accelerator Functional Unit (AFU) for testing memory reads and writes, bandwidth, and latency, follow these steps:

1. Make sure you have the necessary software and tools installed, including the Intel Acceleration Stack for FPGAs.

2. Access the NLB sample AFUs source code, which is located in the $OPAE_PLATFORM_ROOT/hw/samples directory.

3. Choose the appropriate NLB sample AFU based on your FPGA platform:
- nlb_mode_0: Requires the hello_fpga or fpgadiag utility to perform the lpbk1 test.
- nlb_mode_3: Requires the fpgadiag utility to perform the trupt, read, and write tests.
- nlb_mode_0_stp: Same as nlb_mode_0 but with Signal Tap debug feature enabled.

4. Build the selected NLB sample AFU using the provided RTL source code. Refer to the Quick Start Guide specific to your FPGA platform for instructions on building the AFU.

5. Once the AFU is built, you can use the fpgadiag utility to diagnose, test, and report on the FPGA hardware. The fpgadiag utility includes several tests, including the NLB test modes.

6. Configure the test parameters, such as source and destination addresses, number of cache lines, and test mode, using the Control and Status Registers (CSR) provided by the AFU.

7. Start the test execution by writing to the CSR_CTL register.

8. Monitor the test progress and completion by polling the DSM_STATUS register. The hardware AF updates the DSM_STATUS register upon completion or error detection.

9. Analyze the test results, including bandwidth, latency, and any reported errors, to evaluate the performance of the memory reads and writes.

For more detailed information and step-by-step instructions, refer to the Intel Native Loopback Accelerator Functional Unit (AFU) User Guide.